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+ Order for Construction Standard Sand of Pennsylvania Co.
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+
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+ Client: Cult of the Bound Variable
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+ Object: UM-32 "Universal Machine"
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+ -----------------------------------------------------------------
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+ 21 July 19106
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+
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+ Physical Specifications.
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+ ------------------------
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+
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+ The machine shall consist of the following components:
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+
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+ * An infinite supply of sandstone platters, with room on each
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+ for thirty-two small marks, which we call "bits."
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+
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+ least meaningful bit
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+ |
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+ v
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+ .--------------------------------.
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+ |VUTSRQPONMLKJIHGFEDCBA9876543210|
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+ `--------------------------------'
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+ ^
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+ |
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+ most meaningful bit
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+
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+ Figure 0. Platters
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+
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+ Each bit may be the 0 bit or the 1 bit. Using the system of
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+ "unsigned 32-bit numbers" (see patent #4,294,967,295) the
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+ markings on these platters may also denote numbers.
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+
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+ * Eight distinct general-purpose registers, capable of holding one
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+ platter each.
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+
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+ * A collection of arrays of platters, each referenced by a distinct
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+ 32-bit identifier. One distinguished array is referenced by 0
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+ and stores the "program." This array will be referred to as the
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+ '0' array.
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+
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+ * A 1x1 character resolution console capable of displaying glyphs
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+ from the "ASCII character set" (see patent #127) and performing
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+ input and output of "unsigned 8-bit characters" (see patent
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+ #255).
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+
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+
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+ Behavior.
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+ ---------
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+
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+ The machine shall be initialized with a '0' array whose contents
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+ shall be read from a "program" scroll. All registers shall be
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+ initialized with platters of value '0'. The execution finger shall
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+ point to the first platter of the '0' array, which has offset zero.
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+
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+ When reading programs from legacy "unsigned 8-bit character"
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+ scrolls, a series of four bytes A,B,C,D should be interpreted with
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+ 'A' as the most magnificent byte, and 'D' as the most shoddy, with
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+ 'B' and 'C' considered lovely and mediocre respectively.
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+
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+ Once initialized, the machine begins its Spin Cycle. In each cycle
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+ of the Universal Machine, an Operator shall be retrieved from the
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+ platter that is indicated by the execution finger. The sections
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+ below describe the operators that may obtain. Before this operator
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+ is discharged, the execution finger shall be advanced to the next
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+ platter, if any.
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+
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+ Operators.
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+ ----------
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+
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+ The Universal Machine may produce 14 Operators. The number of the
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+ operator is described by the most meaningful four bits of the
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+ instruction platter.
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+
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+ .--------------------------------.
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+ |VUTSRQPONMLKJIHGFEDCBA9876543210|
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+ `--------------------------------'
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+ ^^^^
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+ |
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+ operator number
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+
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+ Figure 1. Operator Description
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+
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+
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+ Standard Operators.
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+ -------------------
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+
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+ Each Standard Operator performs an errand using three registers,
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+ called A, B, and C. Each register is described by a three bit
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+ segment of the instruction platter. The register C is described by
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+ the three least meaningful bits, the register B by the three next
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+ more meaningful than those, and the register A by the three next
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+ more meaningful than those.
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+
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+ A C
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+ | |
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+ vvv vvv
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+ .--------------------------------.
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+ |VUTSRQPONMLKJIHGFEDCBA9876543210|
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+ `--------------------------------'
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+ ^^^^ ^^^
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+ | |
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+ operator number B
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+
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+ Figure 2. Standard Operators
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+
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+
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+ A description of each basic Operator follows.
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+
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+ Operator #0. Conditional Move.
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+
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+ The register A receives the value in register B,
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+ unless the register C contains 0.
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+
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+ #1. Array Index.
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+
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+ The register A receives the value stored at offset
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+ in register C in the array identified by B.
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+
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+ #2. Array Amendment.
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+
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+ The array identified by A is amended at the offset
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+ in register B to store the value in register C.
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+
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+ #3. Addition.
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+
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+ The register A receives the value in register B plus
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+ the value in register C, modulo 2^32.
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+
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+ #4. Multiplication.
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+
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+ The register A receives the value in register B times
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+ the value in register C, modulo 2^32.
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+
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+ #5. Division.
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+
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+ The register A receives the value in register B
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+ divided by the value in register C, if any, where
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+ each quantity is treated treated as an unsigned 32
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+ bit number.
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+
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+ #6. Not-And.
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+
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+ Each bit in the register A receives the 1 bit if
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+ either register B or register C has a 0 bit in that
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+ position. Otherwise the bit in register A receives
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+ the 0 bit.
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+
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+ Other Operators.
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+ ----------------
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+
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+ The following instructions ignore some or all of the A, B and C
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+ registers.
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+
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+ #7. Halt.
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+
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+ The universal machine stops computation.
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+
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+ #8. Allocation.
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+
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+ A new array is created with a capacity of platters
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+ commensurate to the value in the register C. This
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+ new array is initialized entirely with platters
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+ holding the value 0. A bit pattern not consisting of
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+ exclusively the 0 bit, and that identifies no other
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+ active allocated array, is placed in the B register.
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+
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+ #9. Abandonment.
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+
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+ The array identified by the register C is abandoned.
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+ Future allocations may then reuse that identifier.
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+
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+ #10. Output.
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+
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+ The value in the register C is displayed on the console
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+ immediately. Only values between and including 0 and 255
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+ are allowed.
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+
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+ #11. Input.
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+
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+ The universal machine waits for input on the console.
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+ When input arrives, the register C is loaded with the
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+ input, which must be between and including 0 and 255.
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+ If the end of input has been signaled, then the
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+ register C is endowed with a uniform value pattern
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+ where every place is pregnant with the 1 bit.
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+
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+ #12. Load Program.
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+
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+ The array identified by the B register is duplicated
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+ and the duplicate shall replace the '0' array,
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+ regardless of size. The execution finger is placed
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+ to indicate the platter of this array that is
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+ described by the offset given in C, where the value
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+ 0 denotes the first platter, 1 the second, et
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+ cetera.
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+
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+ The '0' array shall be the most sublime choice for
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+ loading, and shall be handled with the utmost
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+ velocity.
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+
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+ Special Operators.
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+ ------------------
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+
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+ One special operator does not describe registers in the same way.
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+ Instead the three bits immediately less significant than the four
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+ instruction indicator bits describe a single register A. The
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+ remainder twenty five bits indicate a value, which is loaded
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+ forthwith into the register A.
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+
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+ A
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+ |
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+ vvv
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+ .--------------------------------.
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+ |VUTSRQPONMLKJIHGFEDCBA9876543210|
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+ `--------------------------------'
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+ ^^^^ ^^^^^^^^^^^^^^^^^^^^^^^^^
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+ | |
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+ | value
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+ |
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+ operator number
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+
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+ Figure 3. Special Operators
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+
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+ #13. Orthography.
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+
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+ The value indicated is loaded into the register A
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+ forthwith.
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+
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+ Cost-Cutting Measures.
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+ ----------------------
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+
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+ As per our meeting on 13 Febtober 19106, certain "impossible
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+ behaviors" may be unimplemented in the furnished device. An
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+ exhaustive list of these Exceptions is given below. Our contractual
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+ agreement dictates that the machine may Fail under no other
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+ circumstances.
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+
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+
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+ If at the beginning of a cycle, the execution finger does not indicate
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+ a platter that describes a valid instruction, then the machine may Fail.
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+
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+ If the program decides to index or amend an array that is not
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+ active, because it has not been allocated or it has been abandoned,
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+ or if the offset supplied for the access lies outside the array's
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+ capacity, then the machine may Fail.
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+
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+ If the program decides to abandon the '0' array, or to abandon an array
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+ that is not active, then the machine may Fail.
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+
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+ If the program sets out to divide by a value of 0, then the machine
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+ may Fail.
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+
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+ If the program decides to load a program from an array that is not
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+ active, then the machine may Fail.
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+
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+ If the program decides to Output a value that is larger than 255, the
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+ machine may Fail.
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+
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+ If at the beginning of a machine cycle the execution finger aims
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+ outside the capacity of the 0 array, the machine may Fail.
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